Haitong: Glass substrate is expected to become a carrier for future development trends. Pay attention to the industry's domestic production process.

Haitong released a research report stating that as packaging substrates move towards larger sizes and higher layer counts, the issue of chip warpage is becoming increasingly prominent. Glass substrates, with their good CTE matching with silicon chips, can effectively combat the warpage issue during the packaging process. Glass substrates are the future trend of packaging substrates. Benefiting from the update and iteration of large-sized AI computing chips under advanced packaging, the glass substrate industry chain is expected to accelerate its growth. Recommended stocks to watch: WG Tech(JiangXi)Group(603773.SH), Shenzhen Fastprint Circuit Tech(002436.SZ). Key points from Haitong: IC carriers are the core materials in the chip packaging process, and glass substrates are expected to become the trend of carrier development in the future. IC packaging substrates not only provide support, heat dissipation, and protection for chips but also provide electronic connections between chips and PCB, playing a crucial role in connecting the two. The global traditional ABF carrier market is expected to reach 507.12 billion yuan in 2023. Intel believes that glass substrates are the trend of carrier development in the future, and by the end of the 2020s, there will be a shift from organic substrates to glass substrates. Using glass substrates does not mean replacing all organic materials in traditional carriers with glass but rather using glass material as the core layer of carriers. For the additional layers at the top and bottom of the core layer, ABF can still be used for layering. Glass substrates are expected to solve the warpage issue that occurs as packaging substrates continuously move towards larger sizes and higher layer counts. Under advanced packaging, high-end computing chip sizes and corresponding carrier areas continue to increase. According to TSMC's technical roadmap, they are developing a method to manufacture intermediate layers of super large sizes. By 2027, the intermediate layers can exceed 8 times the mask limit, with carrier areas exceeding 120mm120mm. In large-sized packaging, the differences in CTE between silicon chips and carrier components make warpage likely to occur, and compared to organic materials, glass CTE is closer to silicon, effectively combating warpage during the packaging process. Through Glass Via (TGV) glass via drilling and metal filling inside the holes are key processes in glass substrate production. TGV (Through Glass Via, glass via drilling) can create small conductive vias on glass substrates, enabling efficient connections between chips. TGV is a key process for producing advanced packaging glass substrates. The main processes of TGV include glass drilling and metal filling inside the holes. The laser-induced wet etching technology in the TGV glass drilling process has promising mass application prospects. TGV holes are relatively large and mostly through-holes, and due to the smooth surface of glass and poor adhesion with commonly used metals (such as Cu), layering between the glass substrate and the metal layer, as well as curling or peeling of the metal layer, may occur. Improving the adhesion between the metal layer and the glass surface is currently a focus of industry research. Risk warning: Global macroeconomic growth is lower than expected, cloud provider capital expenditures are lower than expected, and the research progress of domestic manufacturers in glass substrates is lower than expected.