Samsung announced the performance data of its first batch of 2-nanometer chips, accelerating the chase of TSMC.

Samsung Electronics has announced the first batch of performance data for its upcoming 2nm chip process, marking the company's more active push towards next-generation wafer foundry manufacturing to narrow the gap with TSMC. Samsung announced that its first-generation 2nm process uses a gate-all-around transistor technology, with a 5% performance increase, 8% improved power efficiency, and a 5% reduction in chip size compared to the second-generation 3nm process. This is the first time Samsung has released specific specifications for its 2nm process, which had previously only been described conceptually. TSMC currently controls over 70% of the global wafer foundry market share, while Samsung holds about 7%. Most analysts predict that TSMC's leading position will continue due to high production volume, stable production, and increasing demand for AI accelerators and data center chips. However, industry insiders in South Korea suggest that competition may intensify starting from the 2nm node.