Institutional Site Visit: Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR (TSM.US) won the current CPO, with Samsung betting on the next round.

In the current data center's "Co-Packaged Optics (CPO)" competition, Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR (TSM.US) has taken the lead with the progress of products from Broadcom Inc. and NVIDIA Corporation. Meanwhile, Samsung may be placing its bets on the next stage. On July 12th, the institution PhotonCap released a field research article, pointing out that CPO for switches has officially transitioned from technical verification to customer deployment. Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR's manufacturing and advanced packaging capabilities in this race have been validated by the first batch of top commercial projects. But the future battlefield is much more complex than the current switch CPO. As optical I/Os (optical interconnections) delve into the packaging where heterogeneous computing chips (XPUs) and high-bandwidth memory (HBM) reside, whoever can dominate the collaborative design of these three elements will reshape the entire industry's competitive landscape. Samsung Electronics' Senior Vice President Won-Kyoung Choi proposed at Nano Korea on July 9th that the company is developing 2.xD advanced packaging, intending to integrate HBM, logic chips, and silicon optical chips into the same package. This direction is aimed directly at the optical I/O of AI computing packaging in the future. Currently, Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR is leading in "switch CPO". In the current CPO market, Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR is undisputedly the leader. Research shows that Broadcom Inc.'s 102.4Tbps CPO Ethernet switch based on Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR's COUPE (Compact Universal Photon Engine) platform has been sampled to early customers. Meanwhile, NVIDIA Corporation's Quantum-X photon switch has begun shipping, and the Spectrum-X Ethernet photon switch has entered production, with early adopters including CoreWeave, Lambda, and Oracle Corporation. The common feature of these products is that the optical engines are deployed near the switch ASIC (Application-Specific Integrated Circuit). The core manufacturing foundation of this is Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR's mature silicon photonics technology and SoIC 3D stacking capability. In this architecture, the focus of competition is on the stacking and bonding of photonic integrated circuits (PIC) and electronic integrated circuits (EIC), as well as their integration with switch packaging. HBM is not a necessary component at this stage. In contrast, Samsung's publicly disclosed "Turnkey CPO solution" roadmap is targeting 2029. If we use the current shipments and customer validation of switch CPO as a benchmark, Samsung has not yet formed a commercialization rhythm on par with Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR. Power consumption concerns are driving optical engines closer to computing chips. The reason why optical I/Os are migrating from traditional board-level to packaging internal is primarily driven by power consumption. Materials demonstrated by Samsung Foundry at OECC 2026 reveal a key ladder: - When pluggable optical modules are deployed at the board level, the energy consumption per bit is about 10pJ; - When the optical engine is placed on the substrate near the switch, the energy consumption drops to about 5pJ; - If optical I/Os further penetrate the intermediate layer near the XPU, energy consumption can be significantly reduced to about 2pJ. The core logic of this change lies in "shortening the transmission distance of electrical signals". The closer the optical engine is to the computing chip, the shorter the electrical pathway, and the less need for signal conditioning required to compensate for the losses in board-level wiring and connectors. Therefore, advanced packaging has become a key step in converting "physical power advantages" into "commercial product advantages". It does not mean that CPO will immediately replace pluggable optical modules; the two will coexist for a long time under different transmission distances and power budgets. However, Samsung's data forecasts reveal trends: the pluggable optical market's annual growth rate exceeds 25%, while the CPO market's annual growth rate exceeds 150%. Capital and research resources are pouring crazily into high-integration optical architectures. Two CPO architectures, Samsung and Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR's mismatched competition. Confusing "switch CPO" with "XPU-HBM optical I/O" would seriously underestimate the complexity of the next stage of competition. In fact, these are two completely different architectures: The first one is the mainstream "switch CPO". The optical engine is placed next to the switch ASIC, products from Broadcom Inc. and NVIDIA Corporation fall into this category. It addresses the interconnection power consumption and signal integrity issues in high-bandwidth switching scenarios. Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR's moat lies in silicon technology, advanced bonding, and switch packaging integration. The second one is the optical I/O packaging for "XPU-HBM systems". Its structure involves configuring XPU (or GPU), HBM, and an optical engine containing PIC and EIC on the intermediate layer. At this point, optical I/O is no longer an external component of the switch but truly becomes part of the "computing packaging". Samsung's recently proposed 2.xD advanced packaging is precisely aimed at this direction. The plan integrates HBM, logic chips, and silicon optical chips into the same package and expands the system packaging capabilities through the panel-level redistribution layer (RDL) to meet the massive bandwidth throughput demands of AI data centers. For investors, the competition logic of these two architectures is completely different: the former tests a single manufacturing and packaging process, while the latter requires deep joint optimization of design in the "early stages" of computing, memory, optics, and packaging. Samsung's trump card and the reality constraint of multi-wafer yield. Samsung's potential differentiation advantage lies in its "three-in-one" business layout, which includes HBM, logic chip foundry, and silicon photon platform. While Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR has top-notch logic foundry, silicon technology, and CoWoS packaging capabilities, it does not produce HBM itself. Samsung has been able to connect HBM with its wafer foundry capabilities through the SF4 base wafer and has established its own silicon photon platform. This means that, theoretically, Samsung can internally complete the joint design of HBM interfaces, logic I/O, optical engines, and thermal management without having to rely on external memory suppliers. The 2.xD packaging faces a very strict test of "multi-wafer yield". When logic chips, HBM, PIC, EIC, and the intermediate layer are packed into the same package, the failure of any component will lead to the scrapping of the whole set of expensive packaging. The increasing number of chips, the expanding packaging area, and the increasing complexity of bonding are exponentially magnifying yield pressures and cost risks. Meanwhile, the competitors are not idle. Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR is advancing the integration of COUPE and CoWoS packaging, accessing HBM through a mature external ecosystem. On the other hand, storage giant SK Hynix is also aggressively filling in advanced packaging capabilities. Its $3.87 billion advanced packaging factory in Indiana, USA, will start production in 2028 and has already included CPO in its technical research and development roadmap for memory systems. The cross-border collaboration of optics, memory, and packaging is becoming a common driving force for the entire industry chain. Orders are the only standard to test victory or defeat. Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR has won the first round of the switch CPO competition, with its advantage built on actual customer sampling, product shipments, and production progress. Samsung is betting on the next battle: trying to leverage its vertical integration capabilities in HBM, logic, and silicon optics to achieve overtaking in the AI computing packaging field. However, the market should not equate "technical roadmaps" with "commercial moats". In the next 12 months, the most worthwhile signal to track in the industry is whether there will be a design order from a named customer in the market, explicitly requiring Samsung to manufacture HBM, logic chips, and optical I/O bound together in the same package? If this order is fulfilled, Samsung's "three-in-one" will transform from paper assets into a real commercial weapon. If it fails to materialize, Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR's flexible path built on leading technology and external HBM ecosystem will remain the most prudent choice for AI giants. This article is reproduced from Wall Street, edited by GMTEight: Chen Yufeng.