NVIDIA Corporation (NVDA.US) buys 5 million optical modules in a year, but dismantles them by hand.

In 2026, Nvidia plans to acquire more than 80% of the global 1.6T optical modules, exceeding 5 million units; in the same year, it completely "welds" the optical modules on its new generation switch chips into the chip package - the buyer and the dismantler are the same person. At this moment, you can see three forms of "light" on Nvidia's product list at the same time: pluggable optical modules plugged into the panel, CPO optical engines soldered next to the switch chips, and GPU package with optical I/O in the roadmap marked as "under exploration". Behind these three forms is the same physical fact: when electricity can no longer run in copper wires, light must come closer and closer to the chip. This article explains this matter from the beginning: first calculate - where and how much the light costs in a $3 million NVL72 rack; then explain the motive - why light needs to enter the chip; dismantling the technology - what chips are in the CPO package, what is TSMC's COUPE, its relationship with CoWoS, and why yield is the biggest obstacle; finally, look at the change - when the light modules are dismantled into six segments and redistributed, who the design rights fall to, and where the companies making light modules should go. Let's start with the conclusion: Five-sentence version Buying and dismantling happen at the same time: Nvidia is the world's largest single buyer of optical modules (more than 80% of the 1.6T demand in 2026 comes from them, with pluggable supply chain consisting of Zhongji Innolight, Eoptolink Technology Inc., Coherent, and Nvidia's self-designed channels); but on their own CPO switches, they have completely dismantled the "optical module" product. The closer the light is to the chip, the lower the power consumption: 800G ports have reduced power consumption from about 30W to about 9W, and energy consumption per bit has dropped from over 30pJ in the copper interconnect era to less than 5pJ in the substrate-level CPO and further below 2pJ in the future with the optical I/O in the intermediate CoWoS layer. CPO is not a new optical module, but a dismantling and reconstruction of the "optical module" product: Nvidia designs the silicon photonic chips themselves, which are manufactured by TSMC COUPE, packaged by Siliconware, use laser drivers from Coherent/Lumentum, and optical fiber coupling from Sumitomo/Chyou Den - traditional optical module factories are not in this BOM. But time is on the progressive side: CPO's penetration rate in AI data center optical communication is about 35% by 2030 (ONe estimates), pluggable shipments are expected to triple between 2025-2030; interconnecting GPUs through light will have to wait until after 2028 - the intermediate window is being filled with NPO/XPO routes that are friendly to module factories. The way out for optical module factories is not to hold onto the "module", but to follow the value: move up to design silicon photonic chips (Xilinx's self-developed PIC+Tower foundry), laterally deliver engine-level optics (NPO/detachable CPO), or slot into the new BOM device segments (ELS light sources, FAU fiber arrays). PART ONE Buy: The optical ledger of the world's largest buyer 1.1 First look closely: the cabinet is dominated by copper, light stays at the door Many people think AI cabinets are full of light everywhere, but it's actually the opposite. The NVL72 cabinet has 18 computing trays (72 GPUs + 36 Grace CPUs), 9 switching trays (18 NVSwitches), and 130TB/s of interconnectivity between GPUs via a copper cable backplane - 5184 strands of 224G copper cabling, about two miles long, exclusively supplied by Amphenol. Copper is cheap, reliable, and energy efficient, as long as the distance is short (within a meter), it is still the best solution. Optical modules appear at the "door" of the cabinet: each ConnectX network card on a computing tray connects to an InfiniBand/Ethernet switch outside (so-called scale-out network), a distance ranging from a few meters to over a hundred meters, necessitates light transmission. One GPU typically requires 1-1.5 high-speed optical modules, with Google's TPU cluster ratios reaching 1:4 or more - the more cabinets sold, the larger the optical module ledger. 1.2 BOM breakdown: where the money is spent Nvidia never discloses the pricing and costs of an entire cabinet, but here are the estimates from various research institutions (as noted): 1.3 Sales, margin, and shipments Margins need to be looked at in three layers: the chip layer has the thickest margin (B200 manufacturing cost is about $6,400, sold for $30-40,000); at the cabinet level, there is an implicit margin of about 55-65% due to $300-500K worth of purchased components, with a cabinet-level gross margin of about 55-65%; the company's overall gross margin in FY2026 was 71.1%, with a quarterly trajectory from early cabinet volume dilution to 75%. SemiAnalysis' assessment is that Nvidia is willing to make a small compromise in the cabinet stage to secure attachment rates to its own networks (NVLink/InfiniBand/Spectrum-X) - and networks are the business of light. 1.4 2026 and 2027: two revenue outlines The "trillion-dollar order" can be roughly calculated as follows: actual data center revenue in 2025 was $193.7 billion + an estimated $320 billion in 2026 + an estimated $457 billion in 2027 totaling about $970 billion, which aligns with Huang Renxun's $1 trillion scale (when first mentioned in October 2025, it was $500 billion, doubled in five months). Another noteworthy actual figure: in the second quarter of 2026, Nvidia's networking business revenue was $14.8 billion, a 199% year-on-year growth - mainly driven by the NVL72 cabinet solution, which is a direct manifestation of the "light business" in the financial report. Note: The per-cabinet price is the customer payment figure rather than Nvidia's confirmed revenue; direct multiplication can overestimate by 10-20%; the range of volume for Rubin 2026 (Guo Mingchi's 5-7 thousand cabinets vs. Wolfe's 20 thousand) is the largest discrepancy; Kyber's delay to 2028 may result in a possible downward revision in the contributions from the 2027 Rubin Ultra. 1.5 The optical module ledger: the fastest-growing peripheral market in Nvidia's ecosystem Market: The global optical module market reached $23.8 billion in 2025 (up 50%), and it is expected to grow by another 60-65% in 2026 (LightCounting figures); Demand: In 2026, global demand for 1.6T is between 8.6 million and 20 million, with Nvidia alone exceeding 5 million, accounting for over 80%; in the same year, 800G modules are expected to reach 37 million units (+85%, Citi); Unit price: The price for 800G is around $800-1,200, and for 1.6T it is around $2,000-3,000 (spot price); Supplier landscape in one table: Xuchuang and Eoptolink Technology Inc., collectively take about 60% of Nvidia's pluggable orders; the rest are shared among Coherent, Lumentum, Broadcom, and other U.S.-based companies. Nvidia's in-house channel is worth keeping an eye on: they design their own DSP, outsourced to Fabrinet for assembly, and if self-production reaches over half in the 1.6T era, it will squeeze third-party module factories even before CPO does. PART TWO Why dismantle: light must get closer to the chip The problem with pluggable optical modules is not the "light," but the segment of "electricity" before the light. The signal starts from the switch chip and has to pass through more than 20 cm of PCB traces and connectors to reach the optical module on the panel - this electrical channel had an insertion loss of up to 22dB in the 200G/lane era. To compensate for the loss, a DSP chip had to be included in the module for signal recovery, and the DSP accounted for nearly half of the module's power consumption. By moving the optical engine from the panel to the side of the chip, this electrical channel is reduced from over 20 cm to the millimeter level, reducing the insertion loss from 22dB to 4dB and eliminating the need for DSP (the switch chip's SerDes drives the optical engine directly, i.e., "linear direct drive"). As a result, the power consumption of 800G ports has dropped from about 30W to about 9W, and the energy consumption per bit has dropped from over 30pJ in the copper interconnect era to 5pJ in the substrate-level CPO and further below 2pJ in the future with the intermediate optical I/O layer. For a cluster of hundred thousand cards, this is energy-saving on the scale of "power stations". There is another reason: the majority of the bandwidth hasn't gone optical yet. The bandwidth requirement between GPUs within a cabinet (scale-up) is about 9-10 times higher than that of the external network (scale-out) and is currently dependent on copper cable backplanes. The limit of copper is around a meter, and as cabinet power and scale continue to expand, cross-cabinet interconnectivity becomes a necessity, and this cake that's nine times larger will eventually have to be handed over to light - the question is only in what form and in which year. This is the entire reason why Nvidia "dismantles" the optical modules: it's not that they no longer need light - quite the opposite, they need light more than anyone else; they just no longer need "that box plugged into the panel." When power consumption per watt directly determines how many GPUs can be installed in an AI factory, taking the light out of the box and next to the chip changes from a choice to a necessity. PART THREE How to dismantle: Pluggable -> NPO -> CPO three-step strategy 3.1 Three routes, explained in one table 3.2 What's inside a CPO package One CPO package = 1 main ASIC + a circle of optical engines + HBM (for XPU scenes). Each optical engine is composed of two chips: below is the PIC (silicon photonics chip: modulator, waveguide, detector), and above is the EIC (electronics chip: driver, TIA). Note the counterintuitive design: the laser is not inside the package - it's prone to heat and damage, and the industry makes it a pluggable module on the front panel of the chassis (ELS), which can be easily replaced when malfunctioning. Four real product "recipes": 3.3 TSMC COUPE: The "manufacturing paradigm" of optical engines Nvidia's and Broadcom's new-generation CPO optical engines come from TSMC's COUPE platform (Compact Universal Photonic Engine, introduced in 2021 by the team led by Yu Zhenhua at the ECTC conference, officially launched in 2024). Its core is a revolutionary approach to stacking: the EIC (N7/N6 process) uses SoIC-X non-bumped copper-copper hybrid bonding process to directly stack on top of the PIC (65nm SOI) chips, with a bonding pitch of less than 9 micrometers (conventional bump pitches are 40-50 micrometers) - compressing the electro-optical path, enabling a bandwidth density 23 times higher than conventional bump solutions under the same power consumption. The modulator uses a 200G PAM4 microring (less than 5 micrometers in size), with light entering and exiting vertically through micro lenses and fiber arrays (FAU). As for the second reason: the bandwidth's big piece actually hasn't shifted to light yet. The bandwidth demand between GPUs within the cabinet (scale-up) is about 9-10 times higher than the external network's (scale-out), and is currently handled through copper cable backplanes. The copper's limit is around a meter, and when the cabinet power and scale continue to grow, cross-cabinet interconnects become a necessity, and this nine-times-larger cake will sooner or later be handed over to light - the only question is in what form and in what year. This is Nvidia's entire reason for "dismantling" the optical modules: they don't need light anymore - it's quite the opposite; they need light more than anyone else; they just don't need "that box plugged into the panel." When power consumption per watt directly determines how many GPUs can be installed in an AI factory, taking the light out of the box and next to the chip changes from a choice to a necessity. 3.3 TSMC COUPE: The "manufacturing paradigm" of optical engines Nvidia and Broadcom's new generation CPO optical engines come from TSMC's COUPE platform (Compact Universal Photonic Engine, compact universal photon engine introduced at ECTC in 2021 by the team named after Yu Zhenhua and officially launched in 2024). Its core is a revolutionary stacking approach: EIC (N7/N6 process) uses SoIC-X non-bumped copper-copper hybrid bonding process to stack directly on top of the PIC (65nm SOI) chips, with a bonding pitch of less than 9 micrometers (Conventional swell-ring is 40-50 micrometers)The electro-optical path is compressed to the shortest, the bandwidth density is 23 times more than the conventional swelling-point solution under the same power consumption. The modulator uses a 200G PAM4 micro ring (size less than 5 micrometers), light enters from the top through micro lenses and fiber arrays (FAU). As for the second reason: the bulk of the bandwidth hasn't gone light yet. The demand between GPUs inside the cabinet (scale-up) is about 9-10 times more than that for the external network (scale-out); for now, it's managed through copper cable backplanes. The limit of copper is around a meter but as the cabinet power and scale continue to expand, cross-cabinet interconnection becomes a necessity. So, this nine-times-larger cake will soon or later be given to light - the only question is in what form and in what year. This is the whole reason why Nvidia is "dismantling" the optical modulesthey don't need light anymore, it is quite the opposite, they need light more than anyone else, they just don't need the "box plugged into the panel" anymore. When the power consumption per watt directly determines how many GPUs can be loaded in an AI factory, taking the light out of the box and near to the chip changes from a choice to an obligation. 3.3 TSMC COUPE: The "manufacturing paradigm" of optical engines Nvidia and Broadcom's new generation CPO optical engines come from TSMC's COUPE platform (Compact Universal Photonic Engine, compact universal photon engine introduced at ECTC in 2021 by the team named after Yu Zhenhua and officially launched in 2024). Its core is a revolutionary stacking approach: EIC (N7/N6 process) uses SoIC-X non-bumped copper-copper hybrid bonding process to stack directly on top of the PIC (65nm SOI) chips, with a bonding pitch of less than 9 micrometers (Conventional swell-ring is 40-50 micrometers)The electro-optical path is compressed to the shortest, the bandwidth density is 23 times more than the conventional swelling-point solution under the same power consumption. The modulator uses a 200G PAM4 micro ring (size less than 5 micrometers), light enters from the top through micro lenses and fiber arrays (FAU). PART FOUR Once dismantled: The optical module becomes six segments In the pluggable era, a complete product was purchased from suppliers like Xuchuang and Eoptolink Technology Inc, but in the CPO era, this product disappeared - broken down into six segments and distributed to six different roles: 5.2 Time Window: The change is gradual, not abrupt COUPE has proven itself with the implementation of CPO switches and optical engines in 2026. However, the adoption rate of CPO in AI data center optical communications is only about 35% by 2030 (ONe estimates), with pluggable shipments expected to triple between 2025-2030; and interconnecting GPUs through light will have to wait until after 2028 - the intermediate windows will be filled with NPO/XPO routes that are friendly to module factories. 5.3 Xuchuang and Eoptolink Technology Inc: Two strategies for playing the game 5.4 Judgment Framework: Where is the value migrating The value in the industry is gradually shifting in four directions - silicon photonics PIC design (Xuchuang's path), engine-level delivery (NPO/detachable CPO), ELS external light sources (Coherent/Lumentum the new kings, followed by companies like Optoelectronics Guangzhou and Shanghai Communication), FAU/optical fiber components (attentions are on Sumitomo and Fooke Precision Fiber). 5.5 Seven Signals Worth Tracking Appendix: Key figures quick reference Epilogue: The biggest buyer, why does he want to dismantle what he bought the most Returning to the title's paradox. In 2026, Nvidia buys 500 million optical modules a year, and then it dismantles them into the chip package - these two actions are not contradictory. For Nvidia, the optical modules have never been the end goal, they are just a means to obtain bandwidth: buying the box is the most cost-effective at the moment, that's why they are the world's largest buyer; but tomorrow, it's more energy-saving and more controlled to "weld it into the package", so they don't hesitate to change the way they get light. Buying is the ledger of the moment; dismantling is the ledger of the next step. And for the supply chain, there is only one rule: every step that light gets closer to the chip, the "optical module" product is dismantled once, and the value is redistributed. In the pluggable era, the value was with the module factories; in the NPO era, the value was with the engines and light sources; in the CPO era, the value is in chip design (system vendors), advanced packaging (TSMC), and devices (laser/FAU). For every company in the industry, the question is not whether CPO will come, but when it comes, where do they stand in the new BOM.