"The "Red Blue Factory"-led server CPU welcomes a new player! NextSilicon brings the RISC-V architecture to challenge Intel and AMD"

Israeli chip startup NextSilicon announced that its new CPU-type open-source architecture compute chip is undergoing comprehensive evaluation by the US National Laboratories. The company stated on Wednesday that it is developing a central processor (CPU) based on the open-source instruction set architecture (ISA) RISC-V architecture. The company's management expects this CPU to challenge the dominance of the two major chip giants, AMD and Intel, in the data center server CPU market, and also hopes that this CPU will help NextSilicon compete with Nvidia's HPC computing cluster based on data center. In the future, the x86 architecture server CPU product lines of Intel and AMD, as well as Nvidia's Grace CPU based on the ARM architecture, will undoubtedly face a new competitor for a long time. NextSilicon has raised approximately $300 million in funding, and its flagship chip product, the "Maverick-2" data flow accelerator, is designed to greatly accelerate precision scientific computing tasks such as nuclear weapon modeling and supersonic missile simulations. This field was once dominated by Nvidia, but in recent years, as Nvidia has shifted its focus entirely to lower-precision large-scale computing tasks like artificial intelligence, startup chip companies like NextSilicon have been trying to take full advantage of this shift in focus from the AI super giant that has long been ranked first in the world. On Wednesday, NextSilicon revealed for the first time that the company is currently developing a complementary data center server CPU product line in the form of a new central processing unit, using the RISC-V open-source architecture technology, which is a standard open computing architecture that competes primarily with the ARM architecture and is increasingly being adopted by chip giants like Nvidia and Broadcom. It is understood that "AI chip giant" Nvidia often pairs its GPU chip product line with its own or third-party central processing platforms (CPUs), and even collaborates with competing companies like Intel to achieve closer coupling between these two types of chips. Challenging the traditional "x86+GPU" instruction flow combination The essence of the Maverick-2 introduced by NextSilicon is a "data flow/reconfigurable" accelerator (NextSilicon calls it the Intelligent Compute Architecture, non-von Neumann paradigm), where the main computational array is not a general RISC-V architecture computing unit, but the company has embedded multiple RISC-V cores in the chip and advanced packaging system to run serial code paths and control tasks that are difficult to parallelize but must be executed quickly. NextSilicon officially and in technical statements emphasizes that the computational unit of the Maverick-2 operates in a runtime-reconfigurable graph/data flow manner; not equivalent to traditional CPU/GPU instruction flow architecture. NextSilicon also emphasizes that the Maverick-2 integrates proprietary RISC-V cores (such as dozens of E-cores) to handle serial segments. Currently, NextSilicon states that its planned server CPU for mass production in the near future is still a test chip. However, its main chip product line - Maverick-2, and more advanced accelerator chips have entered the actual production stage. NextSilicon claims that it can execute some of the same types of calculations as Nvidia's GPU chip product line at a faster speed and lower power consumption without the need for a complete rewrite of the software code used. The "host+accelerator" supercomputer nodes composed of Maverick-2 and the upcoming RISC-V architecture CPU are not equivalent to the traditional CPU+GPU instruction flow architecture. For HPC and scientific computing loads in data centers, this combination from NextSilicon can provide a better cost-performance ratio and energy efficiency compared to similar data center combinations from Intel and AMD. It is understood that Sandia National Laboratories in the United States has been evaluating a prototype computing system built by NextSilicon for three years. James H. Laros III, Senior Scientist and Vanguard Project Leader at Sandia National Laboratories, stated in a statement that the performance results of NextSilicon's chip products are impressive, demonstrating the real potential for significantly improving the complex computing capabilities of our laboratory without the need for significant software code modifications. Open-source architecture - RISC-V architecture accelerates penetration into the server field, putting pressure on x86 and ARM architectures The upcoming RISC-V architecture CPU named "Arbel" from NextSilicon is designed for HPC (high-performance computing) scenarios in server CPUs, intended to be tightly coupled with the company's Maverick-2/3 accelerators to serve supercomputing centers and scientific computing loads. However, it is currently in the test chip stage. Senior industry insiders in the semiconductor industry generally consider "Arbel" to be part of a "host+accelerator" supercomputing cluster with Maverick-2 - a complete "host + accelerator" stack to challenge the mainstream paradigm of x86 architecture + GPU. The RISC-V architecture CPU named "Arbel" targets the server CPU market long dominated by Intel/AMD. The globally popular open-source instruction set architecture - RISC-V has been rapidly gaining popularity in the field of chip design in recent years, gradually moving towards the most core position in this field, and to some extent has formed a three-way balance with ARM under Arm Holdings and the x86 architectures under Intel. RISC-V is a completely open instruction set architecture (ISA), which means that any entity can access and use this technology for free. This openness has made RISC-V very popular in academia, startups, and some large tech companies. Due to the high overlap in application scenarios between RISC-V and ARM, focusing on low power and embedded scenarios, ARM is its main competitor. However, in recent years, RISC-V has started to be used by many developers in the data center field and may compete with x86 architecture in the future, gradually eroding the market share of x86 and ARM architectures in their respective fields. Based on current publicly available information, compared to Intel and AMD, the CPU products being developed by NextSilicon (codenamed "Arbel," RISC-V) prioritize HPC and a tightly coupled architecture that can reduce the instruction and data transfer overhead in traditional CPU/GPU architectures. Compared to the mainstream paradigm of x86+GPU, it can significantly improve the efficiency and throughput of computing platforms. The open ISA and customization potential of RISC-V are undoubtedly much greater, making it easier to expand according to the vast HPC requirements of laboratories.