"The server CPU led by "Red Blue Factory" welcomes a new force! NextSilicon challenges Intel and AMD with RISC-V architecture"

NextSilicon, a chip start-up company based in Israel, announced that its new CPU-type open-source architecture computing chip is undergoing comprehensive evaluation by US national laboratories. The company stated on Wednesday that it is developing a central processor (CPU) based on the open-source instruction set architecture (ISA) - RISC-V architecture. The company's management expects this CPU to challenge the dominance of the "blue" and "red" chip giants - AMD and Intel, in the data center server CPU market, and also hopes that this CPU will help NextSilicon compete with NVIDIA's HPC computing clusters based on data centers. In the future, the x86 architecture server CPU product lines from Intel and AMD, as well as NVIDIA's Grace CPU based on the ARM architecture, will undoubtedly face a new competitor for a long time. It is known that NextSilicon has raised about $300 million in funding, and its flagship chip product, the "Maverick-2" data flow accelerator, aims to significantly accelerate precision scientific computing tasks such as nuclear weapon modeling and supersonic missiles. NVIDIA used to dominate this field comprehensively, but in recent years, with NVIDIA completely shifting its focus to tasks such as artificial intelligence with low precision, start-up chip companies like NextSilicon have attempted to take full advantage of the shift by this leading AI super giant. On Wednesday Eastern Time, NextSilicon revealed that it is currently developing a complementary data center server CPU product for its main chip product line in the form of a new central processing unit, while this server CPU market is still dominated by Intel and AMD. NextSilicon adopts the technology of the RISC-V open-source architecture, a standard open computing architecture that competes mainly with the ARM architecture and is increasingly being adopted on a large scale by chip giants like NVIDIA and Broadcom. It is known that NVIDIA, the "AI chip giant", often pairs its GPU chip product line with its own or third-party central processing platforms (CPU), and even collaborates with competing companies like Intel to achieve tighter coupling between these two types of chips. Challenging the traditional "x86+GPU" instruction flow combination The essence of the Maverick-2 launched by NextSilicon is a "data flow/reconfigurable" accelerator (referred to by NextSilicon as Intelligent Compute Architecture, non-von Neumann paradigm). The main computational array is not a general RISC-V architecture compute unit, but the company has embedded multiple RISC-V cores in the chip and advanced packaging systems to run serial code paths and control tasks that are difficult to parallelize but need to be executed at high speed. NextSilicon officials and technical media statements emphasize that the computational unit of the Maverick-2 works in a runtime reconfigurable graph/data flow manner; not equivalent to the traditional CPU/GPU instruction flow architecture. NextSilicon officials also emphasize that Maverick-2 integrates in-house RISC-V cores (such as up to dozens of E-cores) to handle serial segments. Currently, NextSilicon states that its planned server CPU for mass production in the near future is still a test chip. However, its main chip product line - Maverick-2 and more advanced accelerator chips have entered the practical mass production stage. NextSilicon claims that it can execute some of the same types of computing tasks as the NVIDIA GPU chip product line at a faster speed and lower power consumption without the need to completely rewrite the software code used. The "host+accelerator" supercomputer nodes composed of Maverick-2 and the upcoming RISC-V architecture CPU are not equivalent to the traditional CPU+GPU instruction flow architecture. For HPC-type supercomputers and scientific computing data center workloads, this combination from NextSilicon can provide a better cost-performance ratio and energy efficiency compared to the similar data center combination from Intel and AMD. It is understood that the Sandia National Laboratory, a comprehensive research institution from the United States, has been evaluating a prototype computing system built by NextSilicon for three years. James H. Laros III, a senior scientist at the Sandia National Laboratory and project leader of Vanguard, said in a statement that the performance results of NextSilicon's chip products are impressive and show the true potential to significantly enhance the complex computing capabilities of our laboratory without the need for significant software code modifications. Open-source architecture - RISC-V architecture accelerates penetration in the server field, putting significant pressure on x86 and ARM architectures The upcoming RISC-V architecture CPU named "Arbel" by NextSilicon is aimed at server-class host CPUs for HPC scenarios, to be tightly coupled with the company's Maverick-2/3 accelerators, serving supercomputers, scientific computing, and other data center workloads. However, it is currently still in the test chip stage. Senior industry insiders in the semiconductor industry generally position "Arbel" as a supercomputing cluster that combines with Maverick-2 - that is, it is used to build a complete "host+accelerator" stack to challenge the mainstream paradigm of x86 architecture + GPU. The RISC-V architecture CPU named "Arbel" is targeting the long-standing dominance of Intel/AMD in the server CPU market. The globally popular open-source instruction set architecture RISC-V has been rapidly gaining popularity in the chip design field in recent years, gradually moving towards the most core position in this field. It has to some extent formed a three-way competition with the ARM under Arm Holdings and Intel's x86 architectures. RISC-V is a completely open instruction set architecture (ISA), which means that any entity can access and use the technology for free. This openness has made RISC-V very popular in the academic world, start-ups, and some large technology companies. As RISC-V and ARM application scenarios highly overlap in focusing on low power and embedded scenes, ARM is its main competitor, but in recent years, RISC-V has started to be used by many developers in the data center field and may compete with x86 architecture in the future, gradually eroding the market share of x86 and ARM architectures in their respective fields. Based on the current public information, compared to Intel and AMD, the CPU products being developed by NextSilicon (code-named "Arbel", RISC-V) prioritize HPC and have a closely coupled architecture that can reduce the overhead of instructions and data movement in traditional CPU/GPU architectures, significantly enhancing the efficiency and throughput of the computing platform compared to the mainstream paradigm of x86+GPU. The open ISA and customization potential of RISC-V are undoubtedly much greater, making it easier to expand according to the large HPC demand of research labs.